Silicon Validation Engineers required for KPIT Cummins, Bangalore

Silicon Validation Engineers

Experience: 3 to 5 years

No. of Positions: 6

Education: BE / BTech / ME / MTech

Location: Bangalore

Job description:

• Develop validation scripts/drivers for the validation of hardware modules in the SOC
• Create validation specifications
• Run the SOC validation tests, Capture the observations and generate validation test reports
• Identify the bugs in silicon,
  

Contact: getjobsinindia2007@gmail.com

PDK engineers required for Cadence Design Systems, Bangalore

Process Development Kit (PDK) Engineer as Lead/Senior Services AE

Experience: 3 to 8 years

Education: BE / BTech / ME / MTech

Location: Bangalore

Job description:

• This engineer’s primary role will be to work in a team oriented environment to create, customize and maintain Process Design Kits (PDKS) for Cadence technology.

• He/she will interact and work with other engineers on the worldwide PDK delivery team.
  

Responsibilities:

• Understanding and interpreting integrated circuit process technologies in order to implement specifications for Cadence optimized Process Design Kits (PDKs).
• Development and maintenance of PDKs includes creation of techfiles, symbols, PCells, Call Backs, CDFs, netlisting and the creation of Qualification data.
• Proficient with the use of PDK automation tools is a plus.
• The engineer must have a solid background in circuits, electronics and physics and should either have or be capable of learning new technical and consulting skills.
• The candidate should possess the necessary engineering and/or consultancy skills, i.e. that he/she is technically excellent with mature communication skills to be able to consult effectively with clients, e.g. to communicate with Customers.
• Contribute to training activities

Requirements:

• Execution on VCAD Customer support projects, e.g. Implementation and testing of PDKs, their components, methodology support, operation and maintenance of VCAD design environments.
• Design Support in VCAD Customer Design projects, both remotely and onsite.
• VCAD Methodology Service Engagements, e.g. Implementation and testing of PDKs, methodology development, operation and maintenance of VCAD design environments.
• Ability to undertake design environment implementation tasks alone and architectural tasks with support within the first year.
• Work on multi person projects of varying complexity, working especially in a multi-site/multi-cultural project. The latter requires good communication skills in English.
• Acquire a basic understanding of the (service) business environment of Cadence within 1 month including pre sales support.

Contact: getjobsinindia2007@gmail.com

Technical Education Services Engineer required for Cadence Design Systems, NOIDA / Bangalore

Technical Education Services Engineer

Experience: 3-5 yrs

Education: BE / BTech / ME / MTech

Location: NOIDA/Bangalore

Skills:

• Practical knowledge of model development in spice, verilog, verilog-a and vhdl
• Solid understanding of CMOS analog circuit design techniques and circuit layout considerations
• Experience in simulation/validation of mixed signal ASIC’s
• Hands on development of analog/mixed signal flows and methodologies
• Proficiency in the following front end CAD tools

Contact: getjobsinindia2007@gmail.com

Physical Design Engineer required for SmartPlay, Bangalore

Design Implementation/DFT/Synthesis/STA for SmartPlay (previously TechForce)

Experience: 4-8 yrs

Education: BE / BTech / ME / MTech (electronics )

Designation: Mid Level / Lead

Location: Bangalore

Skills:

• Compression insertion with X-tolerance, ATPG TPI insertion for coverage improvement, Test mode timing analysis with PT-SI, Debugging pattern simulation with timing for ATPG & memory BIST
• Tester handling & bring-up structural vectors, DFT Verification, DFT implementation, Test Compressor, Full chip SOC, ATPG
• Worked on Synthesis ,STA in synopsys flow, FV in synopsys flow, Knowledge of RTL coding, Synthesis of IP’s, Spyglass is an added advantage
• Good at STA,Timing analysis forFull chip at 65nm
• Should have worked on synopsys tool – DC,primetime
• Should have Formal Verification using LEC

Contact: getjobsinindia2007@gmail.com

SoC Physical Design Engineer required for TechForce, Bangalore

SoC Physical Design Engineer

Experience: 3+ years

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Job Requirement:

• Implementation of multimillion gate SoC designs in cutting edge process technologies (130nm, 90nm & 65nm)
• Work on all aspects of physical design including synthesis, floor planning, bond out, place and route, clock distribution, IP integration, extraction, timing closure, power and signal integrity analysis, physical verification, DFM, and tapeout
• Clear understanding and command over all aspects of physical design
• Experience in ASIC tapeouts, preferably in 90nm or smaller technology technologies
• Expertise in Synopsys, Magma or Cadence backend tools
• Skill and experience in scripting using Tcl or Perl desirable

Contact: getjobsinindia2007@gmail.com

Custom Layout Lead Engineer is required for TechForce, Bangalore

Custom Layout Lead Engineer

Experience: 8 to 10 years of experience in design and layout of memories and standard cells

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Responsibilities:

• Hands-on Lead engineer involved in execution and management of Memory, Standard Cell and other Custom layout projects
• Actively interface with the customer and the engineering team and ensure timely delivery of projects
• Train, mentor & manage the junior engineers
• Job involves execution of work at customer site and at TechForce design center
• May have to travel outside India for a brief period of time customer meetings, project kickoff meetings etc.

Job Requirement:

• Experience in Spice Simulation, Circuit Design, good understanding of memory architecture
• Excellent verbal and written communication skills
• Well experienced is using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc.
• Ability to lead the engineering team

Contact: getjobsinindia2007@gmail.com

SoC Design Verification Engineer required for TechForce, Bangalore

SoC Design Verification Engineer

Experience: 3+ years

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Job Requirement:

• Expertise in Verilog, VHDL
• Proficiency in one or more HVL's a must (Vera, Specman, System C, System Verilog, C/C++)
• Domains – Wireless, Wimax, Graphics, Multimedia, Networking, PCI Express, USB experience a plus
• Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
• Knowledge of Functional coverage using HVL language features or assertions a plus
• Microcode Development
• Good Debugging Skills

Contact: getjobsinindia2007@gmail.com

Senior Services Applicaiton Engineer (DFT) required for Cadence Design Systems, Bangalore

Experience: 3 to 5 years

Location: Bangalore

No. of Positions: 1

Job Requirement:

• All phases of DFT implementation and analysis (Scan, ATPG, BIST, JTAG)
• Post-silicon debugging exposure
• Professional experience in Synthesis
• Prior knowledge on Conformal/Formal Verification activitie

Contact: getjobsinindia2007@gmail.com

Verification Engineer required for Cadence Design Systems, Bangalore or Noida

Experience: 4 to 5 years

Location: India, Bangalore or Noida

Job Requirement:

• This engineer’s primary role will be to work in a team oriented environment to deliver digital logic design and verification methodologies, customised design environments and design implementation solutions that align with client goals. He/she will interact and work with other engineers on the worldwide D&V VCAD delivery team.
• Responsibilities will include creating and customising design environments, design and verification methodologies.
• Ideally the canddate should be able to assist with the optimisation of acceleration and emulation technologies using the Cadence Incisive verification flows including the Palladium and Xtreme hardware.
• The engineer must have a solid background in logic design and verification experience with Cadence technology in the digital domain.
• The client should have at least a basic understanding of modeling (e.g. Architecture or system), and both block and system level verification experiance, preferably with coverage driven methodologies.
• The candidate should possess the necessary engineering and consultancy skills, i.e. that he/she is technically mature with the necessary communication skills to be able to consult effectively with clients, e.g. to talk to, coach and advise Customers.
• The engineer must have a solid background in the electronics industry with at least 4 to 5 years experience, and should be willing to learn new technical and consulting skills.

Key Accountabilities:

• Execution on VCAD Customer support projects, e.g. Implementation and functional verification of design systems.
• Development of customer specific verification environments including components, methodology support, operation and maintenance.
• Be prepared to provide design and verification support in VCAD Customer design projects, both remotely and onsite.
• Ability to handle all design environment implementation tasks and architectural tasks with the minimum support or through working in a joint team of Cadence and Customer engineers.
• Work on multi person projects of varying complexity, working especially in a multi-site/multi-cultural project. The latter requires excellent communication skills in English.
• Acquire a basic understanding of the (service) business environment of Cadence within 6 months including pre sales support.

Contact: getjobsinindia2007@gmail.com

DFT Engineer required for Cadence Design Systems, Bangalore

Experience: 3 to 6 Years

Location: Bangalore, India

Skill Sets: Scan, Jtag, Atpg, Tester interface.

Good to have skills: Exposure to ATPG tools like Encounter Test

Job Description:

• This engineer’s primary role will be to work in a team oriented environment to deliver DFT activities for implementation services. He/she will interact and work with other engineers on the worldwide delivery team.
• This engineer is expected to provide services using the following technical skills: Scan, JTAG, ATPG, Logic Synthesis, Static Timing Analysis, and to interface with designers / testing team.
• In addition to the technical skills they will be expected to operate effectively in project teams delivering the design of leading edge. Additional responsibilities include customer interactions and pre-sales activities.

Key Accountabilities:

• Ability to handle all design environment implementation tasks assigned, either personally or through supervising other Cadence and Customer engineers.
• Work on multi person projects of varying complexity, working especially in a multi-site/multi-cultural project. The latter requires excellent communication skills in English.
• Acquire a basic understanding of the (service) business environment of Cadence including pre sales support.

Contact: getjobsinindia2007@gmail.com

Senior Verification Engineer required for TechForce Design Services

Senior Verification Engineer - Bangalore

Skills/Expertise:

• Language: Vera, System Verilog, System C, Verilog, VHDL
• Domain: USB, PCI, PCI express, ARM, AMBA, Storage or Any peripherals

Location: Bangalore

Experience: 4 yrs & above

Education: BE / B.Tech / ME / MTech / MS

Qualification:

• Expertise in either Vera language or mentioned domain expertise will be preferred
• Exposure to gate level simulation (ModelSim)
• Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
• Knowledge of Functional coverage using HVL language features or assertions a plus
• Proficiency in developing testcases and testbench environment.

Contact: getjobsinindia2007@gmail.com

SiRF requires Program Manager for its India Center

SiRF - Program Manager

Company Profile:

SiRF is a leading GPS Semiconductor company, headquartered in San Jose, California. SiRF develops and markets semiconductor and software products that are designed to enable location-awareness utilizing GPS and other location technologies, enhanced by wireless connectivity capabilities such as Bluetooth, for high-volume mobile consumer devices and commercial applications. As a world leader in GPS technology SiRF's objective is to be the most important GPS company in the world.

SiRF has design and development facilities worldwide. In India, SiRF has offices at Noida and Bangalore. SiRF's culture promotes and inspires the team of world-class engineers and developers to be at the top of their game. SiRF has an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow...today.

Job Description:

• Program Manager

Education:

• Engineering bent of mind required.

Experience:

• 10+ years of experience with at least 3+ years of managing large projects/programs

Description:

The role is to manage the development of ASICs and embedded products being developed at SiRF, India. Responsibility includes working with hardware, silicon and software teams on the definition, development, fabrication and validation of cutting edge ICs in the Bluetooth, Mobile TV, GPS and digital SoC domains.

The candidate needs to have a good understanding of the silicon development process. He/she also must have a strong program management background and the appropriate organizational and communication skills required in developing world class products in a fast paced environment. Apart from the engineering organization, the role will also require a lot of interfacing with marketing, operations and technology teams in the company worldwide. Persons experienced in the management, of development of silicon solutions in the wireless space that have gone to production in state of the art process technologies are preferred.

The candidate should have a strong technical background with experience in at least one of the following areas: Digital/Analog IC design, Embedded software development

Contact: getjobsinindia2007@gmail.com