Tuesday 30 June 2009

Technical Education Services Engineer required for Cadence Design Systems, NOIDA / Bangalore

Technical Education Services Engineer

Experience: 3-5 yrs

Education: BE / BTech / ME / MTech

Location: NOIDA/Bangalore

Skills:

  • Practical knowledge of model development in spice, verilog, verilog-a and vhdl
  • Solid understanding of CMOS analog circuit design techniques and circuit layout considerations
  • Experience in simulation/validation of mixed signal ASIC’s
  • Hands on development of analog/mixed signal flows and methodologies
  • Proficiency in the following front end CAD tools
Contact: getjobsinindia2007@gmail.com

Configuration Management Engineer required for Cadence Design Systems, NOIDA

Configuration Management Engineer

Experience: 3-7 yrs

Education: BE / BTech / ME / MTech

Location: NOIDA

Skills:

  • Experience of working on the UNIX platform and usage of a Version Control tool like CVS is a must and Knowledge of PERL and UNIX shell scripting is a plus
  • Candidate should be familiar with MAKE, and compilation process
  • CVS experience is a strong match
  • Work experience in multi-team, multi-sited projects is a plus
  • Experience in working with computing clusters/ server farms/ grid computing is a definite plus
Contact: getjobsinindia2007@gmail.com

Sr. Technical Writer required for Cadence Design Systems, NOIDA

Sr. Technical Writer

Experience: 3+ yrs

Education: BE / BTech / ME / MTech

Location: NOIDA

Skills:

  • Ability to comprehend technical concepts with experience in creating end-user and system-level documentation and help systems for complex software
  • Thorough knowledge of technical writing concepts
  • An excellent command over English, with good editing and proof-reading skills
  • Proficiency in FrameMaker, Webworks, and MS-Office tools
  • Electronics/EDA experience preferred but not mandatory
Contact: getjobsinindia2007@gmail.com

Project Lead required for Cadence Design Systems, NOIDA

Project Lead

Experience: 7-10 yrs

Education: BE / BTech

Location: NOIDA

Job Description:

  • Manages the planning, development, and implementation of procedures for the testing and evaluation of support website
  • Specifies tests to be performed, compiles data, and makes recommendations for changes required in testing procedures, processes, new testing requirements and/or design of testing environment
  • Selects, develops, and evaluates personnel to ensure the efficient operation of the function
  • Receives assignments in the form of objectives with goals and the process by which to meet goals
  • Management reviews work to measure meeting of objectives
  • Works on issues where analysis of situation or data requires review of relevant factors
  • Exercises judgment within defined procedures and policies to determine appropriate action
  • Erroneous decisions or failure to achieve results will cause delays in schedules
  • Frequently interacts with functional peer groups.

Technical Experience:

  • MS Office
  • MS Project
  • Website administration

Soft Skills:

  • Demonstrated ability to lead distributed project teams
  • Ability to gain cooperation of others
  • Experience in conducting presentations of technical information concerning specific projects or schedules
Contact: getjobsinindia2007@gmail.com

Project Manager required for Cadence Design Systems, NOIDA

Project Manager

Experience: 7-10 yrs

Education: BE / BTech

Location: NOIDA

Job Description:

  • Project manager for project-based timecard system.
  • Business owner responsible for routine monitoring to ensure the system is operating efficiently, entry and business prioritization of occasional upgrades/improvements to the system per end-user demand, and yearly system upgrades at the beginning of each year.
  • Must have broad-based proficiency in SAP including but not limited to: creation and deletion of cost centers and work centers, mass upload of labor rates, expenditure reports, cost center reports, ww labor rate reports, removal or changing of employee hours, project creation and update, timecard noncompliance and numerous other profiles. Responsible for generation of time management reports as well as weekly/quarterly Excel-based timecard analysis for worldwide internal customer base.
  • Requires the ability to work cross functionally and respond to worldwide user base.

Technical Experience:

  • Substantial expertise with SAP (PF1, PR1, HRP-HCM) focused on Finance/Project Accounting/HR
  • Experience with electronic timecard systems
  • Deep expertise in MS Excel (merging multiple databases, writing and debugging VBE macros, usage of pivot tables)
  • Demonstrated project management experience
Soft Skills:
  • Demonstrated ability to quickly resolve unusual user issues & demands
  • Ability to work an extensive work schedule during quarterly and yearly closing periods in a global environment
  • Strong command of spoken English.
Contact: getjobsinindia2007@gmail.com

Sr. Support AE required for Cadence Design Systems, NOIDA

Sr. Support AE

Experience: 3-8 yrs

Education: BE / BTech / ME / MTech

Designation: Mid Level / Lead

Location: NOIDA

Job Description:
  • The Support Applications Engineer (AE) will provide direct technical customer support for Cadence products and will focus on applying technical expertise in multiple products within a specific technology family.
  • The person should be able to act as strong team member and contributor, participate in team projects and initiatives.
  • Expertise in OrCAD Capture, ConceptHDL and Allegro PCB Editor, are added advantage.
  • The person should possess team-success orientation, mature work attitude, and good judgment under pressure.

Responsibilities:

  • Provide technical support to customers, internal and external, for Cadence's Allegro PCB Editor, Allegro Design Entry
  • Provide installation and licensing help
  • Advocate and negotiate bug/enhancement resolution with R&D
  • Contribute to and/or lead internal technology rollout projects and training
  • Develop solutions for inclusion in the Cadence knowledge database
Skills:
  • Experience on any Allegro Design Entry HDL (Concept HDL), Allegro PCB Editor, spectra and Allegro Package Design or equivalent competitor tools
  • Knowledge of High speed design, Signal Integrity and packaging will be an added advantage
  • Possess sound, basic knowledge of EDA industry, R&D Technology Roadmaps, and design flows within own area of technical expertise
Contact: getjobsinindia2007@gmail.com

Monday 22 June 2009

Physical Design Engineer required for SmartPlay, Bangalore

Design Implementation/DFT/Synthesis/STA for SmartPlay (previously TechForce)

Experience: 4-8 yrs

Education: BE / BTech / ME / MTech (electronics )

Designation: Mid Level / Lead

Location: Bangalore

Skills:
  • Compression insertion with X-tolerance, ATPG TPI insertion for coverage improvement, Test mode timing analysis with PT-SI, Debugging pattern simulation with timing for ATPG & memory BIST
  • Tester handling & bring-up structural vectors, DFT Verification, DFT implementation, Test Compressor, Full chip SOC, ATPG
  • Worked on Synthesis ,STA in synopsys flow, FV in synopsys flow, Knowledge of RTL coding, Synthesis of IP’s, Spyglass is an added advantage
  • Good at STA,Timing analysis forFull chip at 65nm
  • Should have worked on synopsys tool – DC,primetime
  • Should have Formal Verification using LEC
Contact: getjobsinindia2007@gmail.com

Saturday 2 May 2009

Embedded Software Engineer required for TechForce, Bangalore

Embedded Software Engineer

Experience: 3 to 5 years

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Job Requirement:
  • Experience in Embedded MAC Protocol Stack development (802.16, 802.11, GSM/GPRS)
  • RTOS based software development (VxWorks, PSOS, Embedded Linux)
  • Experience in embedded SW development tools
  • Experience in developing Networking/Protocol Stack Software for Modems, Access Points
  • Experience in testing communication protocols, Wireless terminals, Base Stations
  • Experience writing device drivers on PC and embedded platforms (Linux)
  • Strong RTOS kernel and RTOS driver development experience
  • Experience in working with wireless, networking, USB stacks
Contact: getjobsinindia2007@gmail.com

SoC Physical Design Engineer required for TechForce, Bangalore

SoC Physical Design Engineer

Experience: 3+ years

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Job Requirement:
  • Implementation of multimillion gate SoC designs in cutting edge process technologies (130nm, 90nm & 65nm)
  • Work on all aspects of physical design including synthesis, floor planning, bond out, place and route, clock distribution, IP integration, extraction, timing closure, power and signal integrity analysis, physical verification, DFM, and tapeout
  • Clear understanding and command over all aspects of physical design
  • Experience in ASIC tapeouts, preferably in 90nm or smaller technology technologies
  • Expertise in Synopsys, Magma or Cadence backend tools
  • Skill and experience in scripting using Tcl or Perl desirable
Contact: getjobsinindia2007@gmail.com

Custom Layout Lead Engineer is required for TechForce, Bangalore

Custom Layout Lead Engineer

Experience: 8 to 10 years of experience in design and layout of memories and standard cells

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Responsibilities:
  • Hands-on Lead engineer involved in execution and management of Memory, Standard Cell and other Custom layout projects
  • Actively interface with the customer and the engineering team and ensure timely delivery of projects
  • Train, mentor & manage the junior engineers
  • Job involves execution of work at customer site and at TechForce design center
  • May have to travel outside India for a brief period of time customer meetings, project kickoff meetings etc.

Job Requirement:

  • Experience in Spice Simulation, Circuit Design, good understanding of memory architecture
  • Excellent verbal and written communication skills
  • Well experienced is using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc.
  • Ability to lead the engineering team
Contact: getjobsinindia2007@gmail.com

SoC Design Verification Engineer required for TechForce, Bangalore

SoC Design Verification Engineer

Experience: 3+ years

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Job Requirement:
  • Expertise in Verilog, VHDL
  • Proficiency in one or more HVL's a must (Vera, Specman, System C, System Verilog, C/C++)
  • Domains – Wireless, Wimax, Graphics, Multimedia, Networking, PCI Express, USB experience a plus
  • Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
  • Knowledge of Functional coverage using HVL language features or assertions a plus
  • Microcode Development
  • Good Debugging Skills
Contact: getjobsinindia2007@gmail.com