Saturday 2 May 2009

SoC Design Verification Engineer required for TechForce, Bangalore

SoC Design Verification Engineer

Experience: 3+ years

Locaiton: Bangalore

No. of Positions: 1

Education: BE/BTech or ME/MTech

Job Requirement:
  • Expertise in Verilog, VHDL
  • Proficiency in one or more HVL's a must (Vera, Specman, System C, System Verilog, C/C++)
  • Domains – Wireless, Wimax, Graphics, Multimedia, Networking, PCI Express, USB experience a plus
  • Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
  • Knowledge of Functional coverage using HVL language features or assertions a plus
  • Microcode Development
  • Good Debugging Skills
Contact: getjobsinindia2007@gmail.com

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