Showing posts with label DFT. Show all posts
Showing posts with label DFT. Show all posts

Monday, 22 June 2009

Physical Design Engineer required for SmartPlay, Bangalore

Design Implementation/DFT/Synthesis/STA for SmartPlay (previously TechForce)

Experience: 4-8 yrs

Education: BE / BTech / ME / MTech (electronics )

Designation: Mid Level / Lead

Location: Bangalore

Skills:
  • Compression insertion with X-tolerance, ATPG TPI insertion for coverage improvement, Test mode timing analysis with PT-SI, Debugging pattern simulation with timing for ATPG & memory BIST
  • Tester handling & bring-up structural vectors, DFT Verification, DFT implementation, Test Compressor, Full chip SOC, ATPG
  • Worked on Synthesis ,STA in synopsys flow, FV in synopsys flow, Knowledge of RTL coding, Synthesis of IP’s, Spyglass is an added advantage
  • Good at STA,Timing analysis forFull chip at 65nm
  • Should have worked on synopsys tool – DC,primetime
  • Should have Formal Verification using LEC
Contact: getjobsinindia2007@gmail.com

Tuesday, 16 December 2008

Senior Services Applicaiton Engineer (DFT) required for Cadence Design Systems, Bangalore

Experience: 3 to 5 years

Location: Bangalore

No. of Positions: 1

Job Requirement:
  • All phases of DFT implementation and analysis (Scan, ATPG, BIST, JTAG)
  • Post-silicon debugging exposure
  • Professional experience in Synthesis
  • Prior knowledge on Conformal/Formal Verification activitie
Contact: getjobsinindia2007@gmail.com

Wednesday, 15 October 2008

DFT Engineer required for Cadence Design Systems, Bangalore

Experience: 3 to 6 Years

Location: Bangalore, India

Skill Sets: Scan, Jtag, Atpg, Tester interface.

Good to have skills: Exposure to ATPG tools like Encounter Test

Job Description:
  • This engineer’s primary role will be to work in a team oriented environment to deliver DFT activities for implementation services. He/she will interact and work with other engineers on the worldwide delivery team.
  • This engineer is expected to provide services using the following technical skills: Scan, JTAG, ATPG, Logic Synthesis, Static Timing Analysis, and to interface with designers / testing team.
  • In addition to the technical skills they will be expected to operate effectively in project teams delivering the design of leading edge. Additional responsibilities include customer interactions and pre-sales activities.
Key Accountabilities:
  • Ability to handle all design environment implementation tasks assigned, either personally or through supervising other Cadence and Customer engineers.
  • Work on multi person projects of varying complexity, working especially in a multi-site/multi-cultural project. The latter requires excellent communication skills in English.
  • Acquire a basic understanding of the (service) business environment of Cadence including pre sales support.

Contact: getjobsinindia2007@gmail.com