Monday 14 April 2008

Senior Verification Engineer required for TechForce Design Services

Senior Verification Engineer - Bangalore

Skills/Expertise:

  • Language: Vera, System Verilog, System C, Verilog, VHDL
  • Domain: USB, PCI, PCI express, ARM, AMBA, Storage or Any peripherals
Location: Bangalore

Experience: 4 yrs & above

Education: BE / B.Tech / ME / MTech / MS

Qualification:
  • Expertise in either Vera language or mentioned domain expertise will be preferred
  • Exposure to gate level simulation (ModelSim)
  • Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
  • Knowledge of Functional coverage using HVL language features or assertions a plus
  • Proficiency in developing testcases and testbench environment.

Contact: getjobsinindia2007@gmail.com

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