Skills/Expertise:
- Languages: Vera, System Verilog, Verilog
- Domains preferred: MPEG, MP3, Multimedia, Audio, Video
Location: Hyderabad
Experience: 4 yrs & aboveEducation: BE / B.Tech / ME / MTech / MS
Qualification:
- Expertise in either mentioned languages or mentioned domain expertise will be preferred
- Exposure to gate level simulation (ModelSim)
- Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
- Knowledge of Functional coverage using HVL language features or assertions a plus
- Proficiency in developing testcases and testbench environment.
Contact: getjobsinindia2007@gmail.com
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