ASIC Verification Engineer required for TechForce Design Services

ASIC Verification Engineer - Noida

Skills/Expertise:

• Languages: Verilog / VHDL / Specman / Vera / System Verilog / System C
• Location: Noida

Experience: 2 yrs – 8 yrs

Education: BE / B.Tech / ME / MTech / MS

Qualification:

• Experience in Verilog / VHDL / Specman / Vera / System Verilog / System C
• Exposure to gate level simulation (ModelSim)
• Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc
• Knowledge of Functional coverage using HVL language features or assertions a plus
  Proficiency in developing testcases and testbench environment.

Important Note: Free accommodation will be provided by us in Noida city until the project is completed for the selected engineers.

Contact: getjobsinindia2007@gmail.com